昨儿个读了《Write Greate Code》Volume1: Understanding the Machine
想通了很久困惑的问题,受益匪浅,贴图以共享
1. 约翰.冯.诺伊曼体系结构(Von Neumann Architecture,VNA)
2.内存物理组织
Read
Write
3.地址总线
8bit
16bit
Say more here, there are a concept named bank which confused me when I read <Intel Architecture Software Developer's Manual>. The physical memory is organized into two banks, even and odd, in 16 bits data addr bus.
So, 16 bits x86 CPUs always put even addr on the addr bus, and if they access odd addr, the CPUs must op memory twice.
32bits
As with 16 bits, 32bits x86 CPUs always put 4X addr on their addr bus.
4. Byte Genders
Little Endian
Big Endian
5. System Clock
6. 内存访问
内存访问时间:从CPU讲地址放到地址总线上开始到CPU从数据总线上取得数据之间的时间。
x86 CPU,具有单周期内存访问时间
等待状态——(CPU)别跑那么快,等等我(IO)
Cache-引用的时空局部特性(temporal and spatial locality of reference)
7. 内存寻址模式
直接(direct), 间接(indirect), 变址(indexed), 比例变址(scaled indexed)
8. 内存层次结构(hierarchy)
说一下NUMA,非一致内存访问(Non-Uniform Memory Access),NUMA本来是说不同类型的内存有着不同的访问时间,此处用来描述一些电气上与主存类似,但由于其速度比主存低很多的内存。一如,显存,闪存。
So..., that's all for today :p
posted on 2006-11-29 11:19
Charles 阅读(696)
评论(0) 编辑 收藏 引用 所属分类:
读书作笔记